School of Engineering Department of Electronic and Computer Engineering 137 Embedded Systems for AI Hardware Supervisor: SHAO, Qiming / ECE Student: JIANG, Yicheng / CPEG Course: UROP1100, Fall UROP2100, Spring In this UROP 2100 program, I act as an ug student helper for embedded systems. I helped to design the embedded part and hardware part to help the PG students to test the MRAM and Hall Bar they designed. In the first month, I designed an analog switch array to help test the Hall Bar. For the rest of the semester, I designed a PCB with a pulse generation function and analog read function to help with the testing on MRAM. Following my design in last semester UROP1100, I finished the first workable version, which can generate pulse ranges from -5V and 5V and read the current accurately to microampere. Embedded Systems for AI Hardware Supervisor: SHAO, Qiming / ECE Student: LIANG, Hongjie / SENG Course: UROP1100, Fall In recent years, AI has been extensively used in many areas, such as weather prediction, speech recognition, and drug development, revolutionising industries by its unparallel ability to maximise the value of data. Nevertheless, AI features a substantially large amount of data transferred between the memory and the processing unit, inevitably posing some new challenges to the conventional digital hardware in which the two abovementioned functional units are separated, and thus the Von Neumann Bottleneck emerges. One of the promising solutions is to replace the traditional memory unit with non-volatile memory capable of performing in-memory computing to reduce power dissipation and improve speeds. This progress report summarises what I have learned regarding emerging non-volatile memory. Embedded Systems for AI Hardware Supervisor: SHAO, Qiming / ECE Student: SHI, Yiqi / ELEC Course: UROP2100, Spring Static random-access memory (SRAM) is a kind of volatile memory that wildly used in computer systems. There are many classic models of SRAM, like the basic 6-transistors-based one. In this study period, I aimed to analyze different kind of models and do simulations to obtain the results. Also, by upgrading SRAM units with peripheral circuits, we are able to implement basic store and release procedure of memory units.
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