School of Engineering Department of Electronic and Computer Engineering 166 Ultra-Low Latency Network Transport for Real-Time Video Streaming Supervisor: MENG Zili / ECE Student: WANG Shao-fu / COGBM Course: UROP 1000, Summer Real-time interactive applications including cloud application, AR/VR, and high-frequency trading demand sub-100ms end-to-end SLOs, yet OS jitter, scheduler delays, and local socket queueing often violate ideal pacing assumptions. We first derive a clean queuing‐delay bound by capping pending data to = × , which guarantees ≤ under perfect measurement. To bridge theory and practice, we embed a regression-based predictor into Meta’s mvfst/BBRv2 stack. Trained on tcset, the model maps { , conf, RTT, throughput} to an internal threshold . At runtime, this adaptive margin optimizes the local buffer that might cause delay over the latency target threshold. Across diverse networks, our approach effectively cuts queuing delay violations. This work shows that combining predictive compensation and local queue management yields low latency guarantees in noisy real-world environments. Ultra-Low-Latency Computer Network Transport System for Virtual Reality Supervisor: MENG Zili / ECE Student: MOK Ka Chun / COGBM Course: UROP 1100, Spring In this UROP (Undergraduate Research Opportunities Program), I collaborated with a senior student at HKUST to investigate optimizations for reducing queueing latency in the application-layer write buffer. Our work focused on mvfst, Meta’s open-source C++ implementation of the IETF QUIC protocol. We designed and implemented a novel algorithm to minimize delays in the application-layer queuing system. FPGA-Controlled Silicon Photonic Switches for Datacenters Supervisor: POON Wing On / ECE Student: CHEUNG Wai Ho / ELEC CHOW Chi Lam / ELEC Course: UROP 1000, Summer A high-precision temperature control system has been implemented on a Xilinx Zynq-7000 FPGA to provide bidirectional thermoelectric cooling for optothermal stability. In order to ensure noise-immune temperature measurements, the design incorporates a stabilized analog front-end, an LM35DZ sensor, and a 12-bit, 1 MS/s XADC with low-pass filtering, median oversampling, and LSB truncation. In order to heat and cool the BTS7960B H-bridge stages, a three-mode PID controller is employed on the ARM processor and converts temperature error signals into dual PWM outputs. Through the use of UART streaming and external visualization, real-time PID tuning is possible, resulting in rapid thermal responses and sustained optical alignment under varying thermal conditions. It has been demonstrated through experimental results that the system is capable of regulating optical power down to 0.1 °C and effectively mitigating thermally induced optical power variations and focal drift. This demonstrates the system’s superiority over microcontrollerbased approaches.
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