School of Engineering Department of Electronic and Computer Engineering 168 EDA for Superconducting Quantum Computing Supervisor: SHAO Qiming / ECE Student: ZHONG Peixi / CPEG Course: UROP 1000, Summer The report discusses what the superconducting quantum computer is, how a superconducting computer works and how to design and control using different tools. The first part introduces different types of current quantum computers and compares their advantages and disadvantages. The second section focuses on the necessary components in quantum computing, including different types of qubits, Josephson junctions, qubit gates, resonators, along with their working mechanisms. Additionally, some common analysis methods are introduced here as well to interpret how superconducting quantum computers work precisely. The final section explores Electronic Design Automation (EDA) tools, a category of powerful programming software used in quantum computing circuit design and simulation. Efficient Combinatorial Optimization Solver Based on Novel Spintronic Devices Supervisor: SHAO Qiming / ECE Student: LU Yunyang / ELEC Course: UROP 2100, Spring Combinatorial optimization problems (COPs) involve identifying the optimal solution from a finite set of possible configurations, with prominent examples including the Max-Cut Problem (MCP) and the Traveling Salesman Problem (TSP). These problems have widespread applications across diverse domains such as transportation planning, AI-driven decision-making, and electronic design automation (EDA). However, solving COPs experience significant computational challenges due to their inherent non-polynomial (NP-hard) time complexity. Conventional general-purpose processors are inefficient in handling these problems because of the enormous computational resources required for exhaustive search. So Ising machines are proposed as domain-specific accelerators for solving COPs efficiently. But traditional CMOS-based 2D topology Ising machines face significant challenges in addressing complex combinatorial optimization problems (COPs) due to limited connectivity and high resource demands. This work proposes an energyefficient, fully connected Ising machine using VCMA-MTJ P-bits and reconfigurable multi-weight Hamiltonian computing core for large-scale and complex COPs. Embedded Systems for AI Hardware Supervisor: SHAO Qiming / ECE Student: GONG Lik Man / ELEC Course: UROP 1100, Spring The use of MRAM promises an effective way of delivering the computational power needed for the current trend in technology, which is characterized by the ever-increasing demands in artificial intelligence and related algorithms. In this research, a custom VCMA-MTJ memory array is tested. Alongside the read and write functionality of an ordinary memory device, the MTJ array can perform MAC (multiply-and-accumulate) operations with the aim of in-memory computing. In the following report, the testing of the MTJ array will be discussed and documented, where a custom PCB is developed to interface the MTJ array with an FPGA test platform, and an IP core is developed on the FPGA for commanding the read, write action on the array.
RkJQdWJsaXNoZXIy NDk5Njg=