UROP Proceeding 2024-25

School of Engineering Department of Electronic and Computer Engineering 179 Open-Source Digital Integrated Circuit Design and Tapeout Supervisor: ZHANG Yihan / ECE Student: TSANG Tsun Yin / ELEC Course: UROP 2100, Fall This report examines different factors affecting how well different z transforms simulate Laplace transform in dynamic, static performance improvement under sampling time reduction. Furthermore, a metric is proposed to evaluate the tradeoff between response performance along computation resource consumption under constant setpoint input scenarios. Through examining these factors, it is found that the choice of sample time has a particularly sweet spot range under consideration of extra register demand, thus First Difference and Bilinear suit for application within that margin. From that, the actuator transform is amended based on the metric. Additionally, the controller expression is derived from the error propagation perspective and slight variation is applied to meet the unit delay introduced by register value transmission. Open-Source Digital Integrated Circuit Design and Tapeout Supervisor: ZHANG Yihan / ECE Student: ZHANG Hongyi / CPEG Course: UROP 1100, Fall This project presents an innovative approach to achieving precise voltage control in electronic circuits. The initial design employed the LT3085 Adjustable 500mA Single Resistor Low Dropout Regulator, which, despite its effectiveness, was constrained by the imprecision of the variable resistor Rset. To overcome this limitation, the project introduces the AD5761R, a 16-bit bipolar/unipolar Digital-to-Analog Converter (DAC), which provides enhanced precision and stability in voltage regulation by enabling detailed control over the output voltage. This report outlines the operational requirements for the DAC and describes the use of Verilog to program its input signals, along with the results of behavior simulations. The findings demonstrate a significant improvement in voltage control accuracy, indicating potential applications in advanced circuit design. Future efforts will focus on developing a user-friendly interface to further improve the system’s usability.

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